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jun e 2016 docid029424 rev 2 1 / 12 this is information on a product in full production. www.st.com STFH18N60M2 n - channel 600 v, 0.255 ? typ., 13 a mdmesh? m2 power mosfet in a to - 220fp wide creepage package datasheet - production data figure 1 : internal schematic diagram features order code v ds @ t jmax r ds(on) max i d STFH18N60M2 650 v 0.28 13 a ? extremely low gate charge ? excellent output capacitance (c oss ) profile ? 100% avalanche tested ? zener - protected ? wide creepage distance of 4.25 mm between th e pins applications ? switching applications ? llc converters, resonant converters description this device is an n - channel power mosfet developed using mdmesh? m2 technology. thanks to its strip layout and an improved vertical structure, the device exhibits low on - resistance and optimized switching characteristics, ren dering it suitable for the most demanding high efficiency converters. the to - 220fp wide creepage package provides increased surface insulation for power mosfets to prevent failure due to arcing, which can occur in polluted environments. table 1: device summary order code m arking package packing STFH18N60M2 18n60m2 to - 220fp wide creepage tube am15572v1_no_tab d(2) g(1) s(3)
contents STFH18N60M2 2 / 12 docid029424 rev 2 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteri stics (curves) ................................ ...................... 6 3 test circuits ................................ ................................ ..................... 8 4 package information ................................ ................................ ....... 9 4.1 to - 220fp wide creepage package information ................................ 9 5 revis ion history ................................ ................................ ............ 11
STFH18N60M2 electrical ratings d ocid029424 rev 2 3 / 12 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v gs gate - source voltage 25 v i d drain current (continuous) at t c = 25 c 13 (1) a i d drain current (continuous) at t c = 100 c 8 (1) a i dm (2) drain current (pulsed) 52 (1) a p tot total dissipation at t c = 25 c 25 w dv/dt (3) peak diode recovery voltage slope 15 v/ns dv/dt (4) mosfet dv/dt ruggedness 50 v/ns v iso insulation withstand voltage (rms) from all three leads to external heat sink (t = 1 s; tc = 25 c) 2500 v t stg storage temperature range - 55 to 150 c t j operating junction temperature range notes: (1) limited by maximum junction temperature. (2) pulse width limited by safe operating area. (3) i sd 13 a, di/dt 400 a/s; v dspeak < v (br)dss , v dd = 400 v . (4) v ds 480 v . table 3: thermal data symbol parameter value unit r thj - case thermal resistance junction - case max 5 c/w r thj - amb thermal resistance junction - ambient max 62.5 c/w table 4: avalanche characteristics symbol parameter value unit i ar avalanche current, repetitive or not repetitive (pulse width limited by t jmax ) 3 a e as single pulse avalanche energy (starting t j =25 c, i d = i ar ; v dd =50 v) 135 mj
electrical characteristics STFH18N60M2 4 / 12 docid029424 rev 2 2 electrical characteristics (t c = 25 c unless otherwise specified) table 5: on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0 v, i d = 1 ma 600 v i dss zero gate voltage drain current v gs = 0, v ds = 600 v 1 a v gs = 0 v, v ds = 600 v, t c =125 c (1) 100 a i gss gate - body leakage current v ds = 0, v gs = 25 v 10 a v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 3 4 v r ds(on) static drain - source on - resistance v gs = 10 v, i d = 6.5 a 0.255 0.28 notes: (1) defined by design, not subject to production test. table 6: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 100 v, f = 1 mhz, v gs = 0 v - 791 - pf c oss output capacitance - 40 - pf c rss reverse transfer capacitance - 5.6 - pf c oss eq. (1) equivalent output capacitance v ds = 0 to 480 v, v gs = 0 v - 164.5 - pf r g intrinsic gate resistance f = 1 mhz, i d =0 a - 5.6 - q g total gate charge v dd = 480 v, i d = 13 a, v gs = 10 v (see figure 15: "test circuit for gate charge behavior" ) - 21.5 - nc q gs gate - source charge - 3.2 - nc q gd gate - drain charge - 11.3 - nc notes: (1) coss eq. is defined as a constant equivalent capacitance giving the same charging time as coss when vds increases from 0 to 80% v dss
STFH18N60M2 electrical characteristics d ocid029424 rev 2 5 / 12 table 7: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 300 v, i d = 6.5 a, r g = 4.7 , v gs = 10 v (see figure 14: "test circuit for resistive load switching times" and figure 19: "sw itching time waveform" ) - 12 - ns t r rise time - 9 - ns t d(off) turn - off delay time - 47 - ns t f fall time - 10.6 - ns table 8: source drain diode symbol parameter test conditions min. typ. max. unit i sd (1) source - drain current - 13 a i sdm (1) (2) source - drain current (pulsed) - 52 a v sd (3) forward on voltage i sd = 13 a, v gs = 0 v - 1.6 v t rr reverse recovery time i sd = 13 a, di/dt = 100 a/s v dd = 60 v (see figure 16: "test circuit for inductive load switching and diode recovery times" ) - 305 ns q rr reverse recovery charge - 3.3 c i rrm reverse recovery current - 22 a t rr reverse recovery time i sd = 13 a, di/dt = 100 a/s v dd = 60 v, t j = 150 c (see figure 16: "test circuit for inductive load switching and diode recovery times" ) - 417 ns q rr reverse recovery charge - 4.6 c i rrm reverse recovery current - 22 a notes: (1) the value is rated according to r thj - case and limited by package. (2) pulse width limited by safe operating area . (3) pulsed: pulse duration = 300 s, duty cycle 1.5% .
electrical characteristics STFH18N60M2 6 / 12 docid029424 rev 2 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance w v d s v gs 6 4 2 0 0 q g (nc) (v) 5 8 10 v dd =480v 300 200 100 0 400 v ds 10 500 v ds (v) i d =13 a 15 20 25 12
STFH18N60M2 electrical characteristics d ocid029424 rev 2 7 / 12 figure 8 : capacitance variations figure 9 : normalized gate threshold voltage vs. temperature figure 10 : normalized on - resistance vs temperature figure 11 : source - drain diode forward characteristics figure 12 : normalized v (br)dss vs temperature figure 13 : output capacitance stored energy i d = 250 a c 100 10 1 0.1 10 v ds (v) (pf) 1 100 ciss coss crss 1000 am15841v1 i d =6.5 a v gs =10v eoss 0 v ds (v) (j) 200 100 500 0 1 2 3 300 400 600 4 5 6 am15843v1
test circuits STFH18N60M2 8 / 12 docid029424 rev 2 3 test circuits figure 14 : test circuit for resistive load switching times figure 15 : test circuit for gate charge behavior figure 16 : test circuit for inductive load switching and diode recovery times figure 17 : unclamped inductive load test circuit figure 18 : unclamped inductive waveform figure 19 : switching time waveform
STFH18N60M2 package information d ocid029424 rev 2 9 / 12 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 4.1 to - 220fp wide creepage package information figure 20 : to - 220fp wide creepage package outline dm00260252_1
package information STFH18N60M2 10 / 12 docid029424 rev 2 table 9: to - 220fp wide creepage package mechanical data dim. mm min. typ. max. a 4.60 4.70 4.80 b 2.50 2.60 2.70 d 2.49 2.59 2.69 e 0.46 0.59 f 0.76 0.89 f1 0.96 1.25 f2 1.11 1.40 g 8.40 8.50 8.60 g1 4.15 4.25 4.35 h 10.90 11.00 11.10 l2 15.25 15.40 15.55 l3 28.70 29.00 29.30 l4 10.00 10.20 10.40 l5 2.55 2.70 2.85 l6 16.00 16.10 16.20 l7 9.05 9.15 9.25 dia 3.00 3.10 3.20
STFH18N60M2 revision history d ocid029424 rev 2 11 / 12 5 revision history table 10: document revision history date revision changes 08 - jun - 2016 1 first release. 16 - jun - 2016 2 document status promoted from preliminary data to production data. minor text changes.
STFH18N60M2 12 / 12 docid029424 rev 2 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information s et forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics C all rights reserved

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